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Welcome to CSNL!

WELCOME !

[Sept 2024] – Welcome Hyeonwoo Sung to the lab!

[March 2024] – Welcome Amin Hong, Dongkyun Lim, Beomsu Kim and Jina Song to the lab!

[Sept 2023] – Welcome Yuanxin Pang and Chistopher Rocca to the lab!

[Mar 2023] – Welcome Gyubeom Jeon to the lab!

[Sep 2022] – Welcome Jihyun Kim and Xiangyu Wu to the lab! 

[Sep 2021] – Welcome Sanzhar, Yassawe, Gilbert and Tho to the lab! 

Papers
0
Students
0

NEWS !

OPENINGS !

OPENINGS : We are actively recruiting students that are interested in research computer architecture, GPU, hardware security, and deep learning architectures. If you are interested, please contact us at jjk12 at kaist dot edu.

UPDATE !
  • Congratulations, Dongkyun! Our “TidalMesh: Topology-Driven AllReduce Collective Communication for Mesh Topology” paper has been accepted at HPCA 2025
  • Congratulations, Hyojun! Our “PIMnet: A Domain-Specific Network for Efficient Collective Communication in Scalable PIM” paper has been accepted at HPCA 2025
  • Congratulations Jihyun! Our “Ghost Arbitration: Mitigating Interconnect Side-Channel Timing Attacks” paper has been accepted at MICRO 2024
  • Congratulations Jihyun! Our “Uncovering Real GPU NoC Characteristics: Implications on Interconnect Architecture” paper has been accepted at MICRO 2024
  • Congratulations, Gilbert! Our “Scalability Limitations of Processing-in-Memory using Real System Evaluations” paper has been accepted at SIGMETRICS 2024
  • Congratulations, Jiho! Our “Decoupled SSD: Rethinking SSD Architecture through Network-based Flash Controllers” paper has been accepted at ISCA 2023
  • Congratulations, Hans! Our “VVQ: Virtualizing Virtual Channel for Cost-Efficient Protocol Deadlock Avoidance” paper has been accepted at HPCA 2023
  • Congratulations, Jiho! Our “Networked SSD: The Flash Memory Interconnection Network for High-Bandwidth SSD” paper has been accepted at MICRO 2022
  • Congratulations, Hans! Our “Dynamic Global Adaptive Routing in High-radix Networks” paper has been accepted at ISCA 2022

our
Research
AREA

Computer
Architecture

Explore next-generation computer architecture, including deep learning accelerators, memory systems, on-chip networks, and scale-out systems.

Interconnection
Networks

High-performance and reliable interconnection network design on heterogeneous systems.
Network-on-chip architecture.

Hardware
Security

Micro-architectural attacks on parallel architecture (GPU) and server-scale NUMA system.

Recent
Publications

  • November 2024 – Congratulations Dongkyun! Our “TidalMesh: Topology-Driven AllReduce Collective Communication for Mesh Topology” paper has been accepted at HPCA 2025
  • November 2024 – Congratulations Hyojun! Our “PIMnet: A Domain-Specific Network for Efficient Collective Communication in Scalable PIM” paper has been accepted at HPCA 2025
  • August 2024 – Congratulations Jihyun! Our “Ghost Arbitration: Mitigating Interconnect Side-Channel Timing Attacks” paper has been accepted at MICRO 2024
  • August 2024 – Congratulations Jihyun! Our “Uncovering Real GPU NoC Characteristics: Implications on Interconnect Architecture” paper has been accepted at MICRO 2024
  • March 2024 – Congratulations, Gilbert! Our “Scalability Limitations of Processing-in-Memory using Real System Evaluations” paper has been accepted at SIGMETRICS 2024
  • March 2023 – Congratulations, Jiho! Our “Decoupled SSD Architecture through Network-based Flash Controllers” paper has been accepted at IEEE ISCA 2023
  • Oct 2022 – Congratulations, Hans! Our “VVQ: Virtualizing Virtual Channel for Cost-Efficient Protocol Deadlock Avoidance” paper has been accepted at HPCA 2023
  • July 2022 – Congratulations, Jiho! Our “Networked SSD: The Flash Memory Interconnection Network for High-Bandwidth SSD” paper has been accepted at IEEE MICRO 2022
  • Mar 2022 – Congratulations, Hans! Our “Dynamic global adaptive routing in high-radix networks” paper has been accepted at IEEE ISCA 2022
  • Oct 2021Congratulations! Our “Decoupled SSD: Reducing Data Movement on NAND-Based Flash SSD” paper has been accepted at IEEE CAL 2021
  • Jun 2021 – Congratulations! Our “Ghost Routing to Enable Oblivious Computation on Memory-centric Networks” paper has been published at ISCA 2021
  • Aug 2021 – Congratulations! Our GPU security (GPU covert channel) paper has been accepted at MICRO 2021
  • Feb 2021Congratulations! Our “The Case for Dynamic Bias in Global Adaptive Routing” paper has been accepted at IEEE CAL 2021
  • Dec 2020 – Congratulations! Our GPU security (Trident – side channel attack) and Deadlock (BoomGate – deadlock avoidance) papers have been accepted at HPCA 2021
  • Sep 2020 – We are currently recruiting new MS students in the area of hardware security and deep learning architecture.  If you are interested, please contact the professor
  • Sep 2020 – Welcome to Jeremy (Ph.D.) and Cheryl (Ph.D) to the lab!
  • Aug 2020 – One paper (on TLB in GPUs) and one poster (on NoC in GPUs) will appear at PACT’20
  • Mar 2020 – Collaboration work with Facebook on Deep Learning Training has been published at ArXiv https://arxiv.org/abs/2003.09518
  • Mar 2020 – Welcome Jangpyo (M.S.) and Jihyun (M.S.) to the lab!
  • Feb 2020 – Collaborative work (NeuMMU – ASPLOS’20) and (Griffin – HPCA’20) have been accepted!
  • Nov 2019 – Ghost Routers: Energy-efficient Asymmetric Multicore Processors with Symmetric NOCs [NOCS’19]
  • Jun 2019 – A Novel Covert Channel Attack Using Memory Encryption Engine Cache [DAC’19]
  • Oct 2018 – Multi-dimensional Parallel Training of Winograd Layer on Memory-Centric Architecture [MICRO’18]
  • Jun 2018 – TCEP: Traffic Consolidation for Energy-Proportional High-Radix Networks [ISCA’18]
  • Apr 2018 – BebeCODE: Collaborative Child Development Tracking System [CHI’18]
  • May 2017 – PlayBetter: A Phone-based Baby Play Support System for Childcare Bystander Parents [CHI’17]
  • Apr 2017 – History-Based Arbitration for Fairness in Processor-Interconnect of NUMA Servers [ASPLOS’17]
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